The invention provides an SOC chip debugging system. The SOC chip debugging system comprises a debugging host, a circuit board and an SOC chip, wherein the debugging host is connected with the circuitboard through a wireless protocol; and the SOC chip is arranged on the circuit board. Compared with related technologies, the SOC chip debugging method and system provided by the invention has the following beneficial effects that position limitation no longer exists between the debugging host and the circuit board, so that a wireless local area network can be used for debugging or the Internet can be used for remote debugging; the SOC chip can be debugged without a simulation debugger and a downloading line, and multiple SOC chips can be debugged at the same time; after a CPU is replaced orupgraded, debugging software only needs to be replaced or upgraded during debugging; multiple debug targets in the local area network or the Internet can be debugged very conveniently at the same time; and the work frequency of a JTAG interface can be greatly increased, so that the data transmission speed is higher.