The invention discloses a gate drive circuit, including a bias pin and first to fifth transistors. The bias pin is coupled to an external resistor and an external capacitor. The first transistor is coupled between the first gate drive voltage and the first contact. The first contact is coupled to the output of the gate drive circuit. The second transistor is coupled to the second and third contacts. The second contact is coupled to the first contact and the third contact is coupled to the bias pin. The first transistor and the third to fifth transistors are P-type transistors and the second transistor is an N-type transistor. The third to fifth transistors are arranged to be opposite to the second transistor and is parallelly connected to the second and third contacts. During the precharge period, the first transistor is maintained in the on state and the second transistor is maintained in the closed state, and the third to fifth transistors are sequentially turned from the closed state to the on state.