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Invention Grant
CN105047619B 晶片堆叠封装体及其制造方法 有权

晶片堆叠封装体及其制造方法
Abstract:
本发明揭露一种晶片堆叠封装体及其制造方法。该晶片堆叠封装体包括：至少一第一基底，其具有一第一侧及相对的一第二侧，且包括一凹口及多个重布线层，凹口位于第一基底内且邻接其一侧边，多个重布线层设置于第一基底上且延伸至凹口的一底部；至少一第二基底，设置于第一基底的第一侧；多个焊线，对应设置于凹口内的重布线层上，且延伸至第二基底上；以及至少一装置基底，设置于第一基底的第二侧。本发明可有效降低晶片堆叠封装体的整体尺寸。
Abstract(English):

A stacked chip package is provided. The stacked chip package includes a first substrate having a first side and a second side opposite thereto. The first substrate includes a recess therein. The recess adjoins a side edge of the first substrate. A plurality of redistribution layers is disposed on the first substrate and extends onto the bottom of the recess. A second substrate is disposed on the first side of the first substrate. A plurality of bonding wires is correspondingly disposed on the redistribution layers in the recess, and extends onto the second substrate. A device substrate is disposed on the second side of the first substrate. A method of forming the stacked chip package is also provided.

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