A target detection assembly includes a detection member adapted to generate a first input signal, and an emulator module is removably secured to the detection member. The emulator module includes an emulator housing assembly removably secured to the detection member and a selection portion is disposed on the emulator housing assembly. The selection portion is configured to be oriented in a first and second selection mode. In the first selection mode, a first emulation circuit disposed within the emulator housing assembly receives the first input signal, processes the first input signal, and outputs a first output signal that is different than the first input signal. In the second selection mode, a second emulation circuit disposed within the emulator housing assembly receives the first input signal, processes the first input signal, and outputs a second output signal that is different than the first input signal and the first output signal.