Provided is a level shift circuit which has a low possibility of erroneous operation due to noise, and which can operate at low power. A level shift circuit (1) comprises: first and second MOSFETs (12a, 12b) using signals of the same and opposite phases as an input signal (Sin) as gate inputs; first and second resistance elements (13a, 13b) connected at one end with a shift level source terminal for supplying high-level output voltage of an output signal after a level shift, and individually connected at the other end to respective drains of the first and second MOSFETs; a comparator (14) in which a pair of differential input terminals are individually connected to the respective drains of the first and second MOSFETs; and a current control circuit (16) for controlling the amount of a first electric current flowing through the first resistance element to the first MOSFET as well as the amount of a second electric current flowing through the second resistance element to the second MOSFET, in synchronization with the rising and falling of the signal level of the input signal.