Provided is a semiconductor memory circuit excellent in long-term reliability and reading characteristics and having low current consumption. The semiconductor memory circuit includes: a first inverter; a first non-volatile memory, which is electrically writable; a second inverter; and a second non-volatile memory, the first inverter having an output connected to a source of the first non-volatile memory, the first non-volatile memory having a drain connected to an input of the second inverter, the second inverter having an output connected to a source of the second non-volatile memory, the second non-volatile memory having a drain connected to an input of the first inverter, the drain of the second non-volatile memory serving as an output of the semiconductor memory circuit.