A method of manufacturing a FET gate with a plurality of materials includes depositing a dummy region 8, and then forming a plurality of metallic layers 16, 18, 20 on gate dielectric 6 by conformally depositing a layer of each metallic layer and then anisotropically etching back to leave the metallic layer on the sides 10 of the dummy region. The dummy region is then removed leaving the metallic layers 16,18, 20 as the gate over the gate dielectric 6.