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发明公开
CN101263467A 浮点规格化和反规格化 有权

浮点规格化和反规格化
摘要：
数据处理系统(510)包括，表示浮点数的尾数的第一组多个比特的第一比特域，和表示浮点数的指数的第二组多个比特的第二比特域。第一组多个比特被分成多个区，每个区包括多于一比特的第一组多个比特。前导零预告器(117)或者其他类型的前导比特指示电路被连接至各个区并确定第一组多个比特的前导比特的位置。连接规格化器(111)以接收包含前导比特的多个区中的区，规格化器可以规格化或者反规格化该区以产生规格化或者反规格化的浮点数。
摘要（英）：

A data processor includes a first bit field of a first plurality of bits representing a mantissa of a floating point number and a second bit field of a second plurality of bits representing an exponent of the floating point number. The first plurality of bits is partitioned into a plurality of regions, each of the plurality of regions comprises more than one bit of the first plurality of bits. A leading zero anticipator or other type of leading bit indication circuit is coupled to each region and determines a position of a leading bit of the first plurality of bits. A normalizer is coupled to receive a region of the plurality of regions that contains the leading bit, the normalizer may normalize or denormalize the region to produce a normalized or denormalized floating point number.

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