Provided is a method for compensating performance degradation of a radio frequency integrated circuit (RFIC) using an EM simulation. The method includes the steps of: (a) extracting the design specifications of the RFIC so as design and simulate a circuit; (b) designing the layout of the designed and simulated circuit, and extracting layout parameters by using the designed layout; (c) simplifying the layout and carrying out the EM simulation to extract performance parameters; (d) carrying out a circuit simulation by using the extracted layout parameters and performance parameters, and judging whether the results of the circuit simulation satisfy the design specifications of the RFIC or not; (e) when it is judged that the results of the circuit simulation satisfy the design specifications of the RFIC, performing a circuit manufacturing process; and (f) when it is not judged that the results of the circuit simulation satisfy the design specifications of the RFIC, partially removing the layout, and carrying out the EM simulation, thereby analyzing and compensating a performance degradation region. The method solves the problems that due to the adoption of a traditional method for designing an RFIC, the performance degradation needs to be rehandled from the initial stage of the designing process and the designing process lasts for a long time.