The invention provides a method and chip group for dynamically increasing the data processing rate during a computer system running. In an embodiment, the computer system comprises a processor, memorizer, and a chip group, in which this processor connects to the core group via a bus. The process is as follows: first, dividing the data processing rate of this computer system into a plurality of super frequency modes; then, detecting at least a super frequency mode conversion condition to decide whether adjusting super frequency mode of the computer system; subsequently, pausing the processor to use the bus in the period of conversing the super frequency mode of the computer system; finally, if deciding to promote the super frequency mode of this computer system, increasing the first clock pulse frequency of the processor, the second clock pulse frequency supporting the bus action and the third clock pulse frequency supporting the memorizer action, in which the data processing rate of the computer system increases further when the super frequency mode of the computer system is lifted.